ARM has extended the functionality of the VSTREAM(TM) Virtual Debug Interface to enable the connection of the ARM® Development Studio 5 (DS-5(TM) ) and RVD(TM) debuggers to ARM Cortex(TM) processors running in RTL simulation. Together, VSTREAM and DS-5 enable earlier and more efficient functional validation and software development for ARM processor-based SoCs on either RTL simulation or hardware-assisted validation platforms.
In the very early stages of the design cycle, VSTREAM may be used to:
- Verify the correct implementation of the debug and trace fabric of the SoC, including any CoreSight(TM) components, by running high-level test patterns and connecting an
In the very early stages of the design cycle, VSTREAM may be used to:
- Verify the correct implementation of the debug and trace fabric of the SoC, including any CoreSight(TM) components, by running high-level test patterns and connecting an
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