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Synopsys, Inc. 700 East Middlefield Road 94043 Mountain View CA, United States http://www.synopsys.com
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Synopsys, Inc.

Synopsys Unveils Proteus Pipeline Technology Delivering A New Level Of Performance

New Pipeline Technology Delivers Reduction in Design-to-Mask Cycle Time

(PresseBox) (SPIE ADVANCED LITHOGRAPHY SYMPOSIUM, San Jose, USA, )
Synopsys, Inc. (Nasdaq:SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced the capability to pipeline key manufacturing applications. This new Proteus Pipeline Technology provides a fully pipelined tapeout flow for maximum CPU utilization and is a major departure from serial manufacturing flows, in which a complete post-optical proximity correction (OPC) database must be available before the latter applications can be initiated. By deploying this capability across its portfolio of proven manufacturing tools, Synopsys provides customers with increased hardware efficiency, enabling significant reductions in both CPU memory consumption and manufacturing turnaround time.

This advance is the logical next step to the Proteus-CATS(r) eXchange (PCX), which was introduced and successfully deployed in November 2007.

Synopsys' Proteus OPC and CATS mask data preparation tools have long enjoyed technology-leading, scalable distributed computation. To eliminate the impact of exploding mask-data volume on the interchange between Proteus and CATS, this incremental data handoff method was developed within PCX. Proteus' new Pipeline Technology extends these proven methods to enable tandem processing of all other manufacturing application stages.

Initially targeting the manufacturing mask tapeout flow, where terabyte databases will soon appear, this new Pipeline Technology utilizes a novel parallel data-processing mode by which computational resources are uniformly engaged and the effects of I/O latencies are masked by synchronal processing. Data and computational tasks are distributed over cluster resources so that applications such as reticle enhancement techniques (RET), optical proximity correction (OPC), mask rule checking (MRC), lithography rule checking (LRC), mask data preparation (MDP), and user-customized geometry operations are executed concurrently. The main benefits are reduced total mask tape-out turnaround time and improved hardware utilization compared to conventional flows, in which each sequential stage in the mask tapeout flow generates a complete database before handing it off to the next stage. Without the need to hold complete databases at any point, cluster memory footprint is drastically reduced. Proteus' new Pipeline Technology was deployed within an effortless job-flow environment, offering both ease-of-use and programmability.

The next phase of Proteus Pipeline Technology deployment will include incremental handoffs to the mask-write hardware. This will enable mask writing to be executed concurrently with all of the applications in the mask tape-out flow, further reducing the net time to mask where appropriate. For customers without mask-write hardware, incremental data can be propagated concurrently to merchant mask shops via file transfer protocol (FTP), thus eliminating latency associated with whole-mask data file FTP. Dynamic MRC and LRC error review and repair are also provided in this phase to maintain the optimal design-to-mask cycle time.

"The semiconductor industry is facing increasing turn around time pressures at the 32 nanometer node and beyond, and Synopsys is committed to providing leading technology to address these challenges," said Synopsys senior vice president, Marketing and Business Development, John Chilton. "The revolutionary Proteus Pipeline Technology is an example of a close collaboration with semiconductor manufacturers worldwide and of continued investment in the manufacturing sector by Synopsys."

Availability Proteus Pipeline Technology is presently in limited release to select customers and will be demonstrated during the SPIE 2008 Advanced Lithography Conference, February 24-29, at the San Jose (Calif.) Convention Center. The general production release, Proteus 2007.12 SP1, will be available in the May.

Synopsys, Inc.

Synopsys, Inc. (Nasdaq:SNPS) ist ein weltweit führender Anbieter von Electronic-Design-Automation-(EDA)-Software für Entwürfe im Halbleiterbereich. Die Firma liefert technologie-führende Halbleiter-Entwurfs- und Verifikationsplattformen sowie IC-Fertigungssoftware für den globalen Elektronikmarkt und ermöglicht somit die Entwicklung und Produktion komplexer integrierter Schaltungen und elektronischer Systeme. Mit seinen umfassenden Lösungen adressiert Synopsys die wesentlichen Herausforderungen, mit denen sich Entwickler und Hersteller heute konfrontiert sehen, darunter Power-Management, verkürzte Time-To-Yield sowie System-To-Silicon-Verifikation. Synopsys hat seinen Hauptsitz in Mountain View, Kalifornien, und unterhält mehr als 60 Büros in Nordamerika, Europa, Japan und Asien. Besuchen Sie Synopsys online unter http://www.synopsys.com/.

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The publisher indicated in each case (see company info by clicking on image/title or company info in the right-hand column) is solely responsible for the stories above, the event or job offer shown and for the image and audio material displayed. As a rule, the publisher is also the author of the texts and the attached image, audio and information material. The use of information published here is generally free of charge for personal information and editorial processing. Please clarify any copyright issues with the stated publisher before further use. In case of publication, please send a specimen copy to service@pressebox.de.