Synopsys, Inc. (Nasdaq:SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that National Semiconductor Corp has selected Synopsys as their key EDA partner for use in product development. The expanded relationship provides National access to Synopsys' Analog/Mixed-Signal and custom IC design tools and the opportunity to collaborate in next generation solutions.
As part of the agreement, National has chosen products across Synopsys' product portfolio, including Synopsys' Galaxy(tm) design platform featuring IC Compiler place-and-route technology, Design Compiler® synthesis, PrimeTime® timing analysis, Star-RCXT(tm) parasitic extraction, Hercules(tm) physical verification, DFT MAX scan compression synthesis and TetraMAX® automatic test pattern generation; Synopsys' Discovery(tm) verification platform featuring the VCS® and HSIM(tm) simulators for analog and digital verification; and the Taurus(tm) Medici and Sentaurus device simulators from Synopsys' TCAD portfolio.
"Today's analog and mixed-signal products increasingly require more complex EDA solutions," said James Lin, vice president of Technology Infrastructure at National Semiconductor. "In choosing Synopsys as a key EDA partner we have the opportunity to work together in solving our current and future design needs."
"National and Synopsys have a number of common goals, including helping create more power-efficient products that can still deliver the numerous capabilities users demand," said Aart de Geus, chairman and CEO of Synopsys. "We are fortunate to have an opportunity to collaborate with an acknowledged leader in mixed-signal design as we work to develop the next generation of custom IC solutions."
As part of the agreement, National has chosen products across Synopsys' product portfolio, including Synopsys' Galaxy(tm) design platform featuring IC Compiler place-and-route technology, Design Compiler® synthesis, PrimeTime® timing analysis, Star-RCXT(tm) parasitic extraction, Hercules(tm) physical verification, DFT MAX scan compression synthesis and TetraMAX® automatic test pattern generation; Synopsys' Discovery(tm) verification platform featuring the VCS® and HSIM(tm) simulators for analog and digital verification; and the Taurus(tm) Medici and Sentaurus device simulators from Synopsys' TCAD portfolio.
"Today's analog and mixed-signal products increasingly require more complex EDA solutions," said James Lin, vice president of Technology Infrastructure at National Semiconductor. "In choosing Synopsys as a key EDA partner we have the opportunity to work together in solving our current and future design needs."
"National and Synopsys have a number of common goals, including helping create more power-efficient products that can still deliver the numerous capabilities users demand," said Aart de Geus, chairman and CEO of Synopsys. "We are fortunate to have an opportunity to collaborate with an acknowledged leader in mixed-signal design as we work to develop the next generation of custom IC solutions."
