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Synopsys Announces Production-Ready Lynx Design System Optimized for Common Platform 28-nm High-K Metal Gate Technology
Collaboration Brings Integrated and Validated IP, Design Tools and Methodology to Facilitate Low Power, High-performance Mobile System-on-Chip Design
"By combining expertise and providing early access to each other's technology, our multi-year collaboration with Synopsys has helped accelerate the development of our advanced 28-nanometer HKMG technology," said Kevin Meyer, vice president of design enablement, strategy and alliances at GLOBALFOUNDRIES, on behalf of the Common Platform alliance. "The optimized Synopsys Lynx Design System, Synopsys DesignWare IP and ARM Artisan Physical IP for our Common Platform 28-nanometer HKMG technology will help enable designers to more easily achieve optimized results, lower design costs and shorter time-to-market. Based on the success we have had at 32 and 28-nanometers, we look forward to extending this collaboration to 20-nanometer."
The production-ready Lynx Design System provides design teams with a comprehensive design environment, including:
- An open, advanced production flow based on the Synopsys Galaxy(TM) Implementation Platform
- A Foundry-Ready System technology plug-in pre-validated for CPA 28-nm HKMG technology to accelerate project start and tape-out
- Advanced visualization capabilities for managing chip design that enable easy flow configuration and execution, as well as on-demand project metrics
The Lynx Design System takes full advantage of the latest Galaxy enhancements, including:
- Low power implementation flow including concurrent multi-corner, multi-mode (MCMM) optimization and analysis with support for IEEE 1801 standard
- Design Compiler® Graphical physical guidance to IC Compiler that tightens timing and area correlation for a faster, predictable and convergent path from RTL to GDSII
- IC Compiler Zroute DFM-optimized router and In-Design DRC auto fixing with IC Validator, dynamic rail analysis with PrimeRail, and final stage leakage reduction that preserves timing
"This collaboration has enabled Synopsys to bring to market a comprehensive front-to-back 28-nanometer design solution based on the Lynx Design System," said Rich Goldman, vice president of corporate marketing and strategic alliances at Synopsys. "Design teams are now able to access the seamless integration of design tools from our Galaxy platform with the Lynx Design System's Foundry-Ready System, Synopsys DesignWare IP and ARM Physical IP for CPA 28-nm technology to speed the development of their most advanced SoCs."
The Foundry-Ready System technology plug-in for CPA 28-nm technology provides:
- Scripts, templates and documentation based on Lynx's pre-validated production design flow, using 28-nm HKMG foundry technology files and ARM Artisan standard cell logic and memory physical IP, to expedite project setup and design start
- Baseline process-specific methodologies, representative settings, design checks and guidelines that speed design closure and tape-out to CPA foundries
The ARM Artisan(TM) Physical IP platform for the Common Platform CPA 28-nm technology process provides the fundamental building blocks to implement high performance, low power SoCs. ARM's silicon proven IP platform offers a comprehensive set of memory compilers, standard cells/logic and general purpose IO (GPIO) products that meet the most demanding performance and power requirements of the mobile communication and computing markets.
"Through this collaboration, ARM® has demonstrated a highly tuned suite of physical IP, delivering industry leading low power and high performance for the CPA 28-nm HKMG technology that's proven in design flows and silicon," said John Heinlein, vice president of marketing, Physical IP Division at ARM. "The Synopsys Lynx Design System, ARM Cortex(TM) processor IP and Artisan(TM) Physical IP for CPA 28-nm HKMG technology will enable our customers to accelerate their path to silicon on the leading-edge SoC technology node."
The Lynx Design System also provides an environment for full SoC integration of processors, peripherals and interface IP, including:
- High performance, low power-optimized implementation for the ARM Cortex-A9 MPCore(TM) processor. This multicore processor delivers increased performance, scalability and increased control over power consumption for high-performance networking, auto-infotainment, mobile and consumer applications.
- Synopsys DesignWare interface IP, including the USB 2.0 On-the-Go (OTG), HDMI 1.4 and DDR 3/2 PHYs for CPA 28-nm LP technology. These PHYs are optimized for area and low power, and designed to compensate for process, voltage and temperature variations, targeting mobile and consumer applications.
Join us at the Common Platform Technology Forum at the Santa Clara Convention Center on Tuesday, January 18 at 4:30pm to attend the technical track session "The Synopsys Production-Ready, Advanced 32-nm and 28-nm Low-Power HKMG SoC Design Solution - Are You Ready for 32-nm and 28-nm Design?" By attending, you can learn more about this optimized Lynx Design System.
The Synopsys Lynx Foundry Ready System for the CPA 28-nm LP will be available to customers starting in Q1 of 2011. The Lynx Foundry Ready system for CPA 32-nm LP, CPA 32-nm and 28-nm LP foundry reference flows based upon the Galaxy Implementation Platform and front-end views for the CPA 32-nm and 28-nm LP Synopsys DesignWare PHY IP are available now. ARM Physical IP for the CPA 32-nm and 28-nm HKMG process is readily accessible from ARM through DesignStart(TM) : http://designstart.arm.com, and the CPA 32-nm and 28-nm LP HKMG PDKs are available from the CPA companies:GLOBALFOUNDRIES, IBM and Samsung.
Forward Looking Statements
This press release contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, including statements regarding the expected benefits and date of availability of the Synopsys Lynx Foundry-Ready System for the Common Platform alliance 28-nm. These statements are based on current expectations and beliefs. Actual results could differ materially from those described by these statements due to risks and uncertainties including, but not limited to, engineering difficulties and other risks as identified in the section of Synopsys' Annual Report on Form 10-K for the fiscal year ended October 31, 2010 entitled "Risk Factors."
Synopsys, Design Compiler, DesignWare and Galaxy are trademarks or registered trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
ARM is a registered trademark of ARM Limited. Artisan, Cortex, MPCore and DesignStart are trademarks of ARM Limited.
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