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"SYNOPSYS' Designware verification IP enhanced to support new SATA 6Gbps specification"
Verification IP Enables Faster Testbench Development for Mass Storage SoC Designs
The DesignWare Verification IP supports all major simulators and verification languages including Verilog, SystemVerilog, VHDL and Vera, allowing designers to quickly and efficiently create a comprehensive SATA-based environment. In addition, the Verification IP for SATA delivers up to 5X performance improvement when used with Synopsys' VCS® simulation tool. Synopsys' comprehensive solution also includes the silicon-proven DesignWare digital controllers and PHY IP for SATA, providing designers with access to a complete SATA solution from a single IP vendor.
"Verification IP plays a critical role in lowering the testbench development time and cost by reducing the need to create a verification environment from the ground up," said John Koeter, senior director of marketing for IP and Systems at Synopsys. "The DesignWare Verification IP with support for 6Gbps enables designers to quickly take advantage of the latest specifications, while lowering integration risk and speeding their product development time."
The DesignWare Verification IP for SATA with support for 6Gbps is available today as a standalone product, both in the DesignWare Library and VCS Verification Library. For more information, please visit http://www.synopsys.com/...
About DesignWare IP
Synopsys offers a broad portfolio of high-quality, silicon-proven digital, mixed-signal and verification IP for system-on-chip designs As a leading provider of connectivity IP, Synopsys delivers the industry's most complete solutions for widely used protocols such as USB, PCI Express, SATA, Ethernet and DDR. In addition to connectivity IP, Synopsys offers SystemC transaction level models to build virtual platforms for rapid, presilicon development of software. When combined with a robust IP development methodology, extensive investment in quality and comprehensive technical support, DesignWare IP enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit http://www.synopsys.com/...
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