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SMIC and Synopsys Announce the Availability of Reference Flow 4.0

Flow addresses critical low power challenges of 65-nanometer designs with Synopsys' Eclypse Low Power Solution

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Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and Semiconductor Manufacturing International Corporation ("SMIC"? NYSE: SMI and SEHK: 0981.HK), the largest foundry in Chinamainland, today announced the availability of the 65-nanomter (nm) RTL-to-GDSII reference design flow, version 4.0. The reference flow, the result of collaboration between Synopsys Professional Services and SMIC, adds the Synopsys Eclypse(tm) Low Power Solution and IC Compiler Zroute technology, expanding the resources available to designers to address low power and design-for-manufacturing challenges at smaller process nodes. The result for customers is immediate access to an optimized path to SMIC silicon at 65-nm to help them meet aggressive project timelines.

The flow utilizes Synopsys' Galaxy(tm) Implementation Platform, a key part of the Eclypse Low Power Solution, providing designers with the ability to implement advanced low power techniques throughout the design flow including RTL synthesis and test, physical implementation and signoff stages. In addition, IC Compiler's Zroute technology supports SMIC's 65-nm routing rules using advanced routing algorithms to evaluate the impact of manufacturing rules, timing and other design goals. The integration of Zroute balances design-for-manufacturing (DFM) optimization techniques with design timing, area, power and signal integrity goals for a particular chip design.

The reference design flow was validated using SMIC's in-house-developed CCS standard cell library, SRAM, PLL, IO Library and low power cell library. The validation included multiple Vdd and multiple supply blocks with power-gating and data retention. Additional key features of the flow include multi-corner multi-mode (MCMM) optimization and critical area analysis and reduction, using IC Compiler, and design-for-test (DFT) synthesis combined with on-chip clocking control support for automatic generation of at-speed tests.

"SMIC's 65-nanometer logic process requires a flow that addresses critical timing, power leakage and DFM issues to reduce risk and increase the quality of results," said Paul Ouyang, vice president of Design Services Center at SMIC. "We worked closely with Synopsys to once again deliver a solution that enables our mutual customers to take advantage of both companies' leading technologies. We look forward to an ongoing relationship with Synopsys as we move toward even more advanced process nodes."

"Synopsys works closely with our semiconductor foundry partners to enable our mutual customers to accelerate their designs into manufacturing," said Rich Goldman, vice president of Corporate Marketing and Strategic Alliances at Synopsys. "Our collaboration with SMIC gives IC engineering teams a proven reference flow to advance their SoC designs targeting SMIC's 65-nanometer process technology, leveraging Synopsys' low power and DFM technologies."

Availability

The SMIC-Synopsys Reference Flow 4.0 is available now. For more information, please contact your SMIC account manager or send email to Design_Services@smics.com.

About SMIC

Semiconductor Manufacturing International Corporation ("SMIC"; NYSE: SMI; SEHK: 981) is one of the leading semiconductor foundries in the world and the largest and most advanced foundry in Mainland China, providing integrated circuit (IC) foundry and technology services at 0.35um to 45nm. Headquartered in Shanghai, China, SMIC has a 300mm wafer fabrication facility (fab) and three 200mm wafer fabs in its Shanghai mega-fab, two 300mm wafer fabs in its Beijing mega-fab, a 200mm wafer fab in Tianjin, a 200mm fab under construction in Shenzhen, and an in-house assembly and testing facility in Chengdu. SMIC also has customer service and marketing offices in the U.S., Europe, and Japan, and a representative office in Hong Kong. In addition, SMIC manages and operates a 200mm wafer fab in Chengdu owned by Cension Semiconductor Manufacturing Corporation and a 300mm wafer fab in Wuhan owned by Wuhan Xinxin Semiconductor Manufacturing Corporation. For more information, please visit http://www.smics.com.

Synopsys, Inc.

Synopsys, Inc. (NASDAQ:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 80 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.

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The publisher indicated in each case (see company info by clicking on image/title or company info in the right-hand column) is solely responsible for the stories above, the event or job offer shown and for the image and audio material displayed. As a rule, the publisher is also the author of the texts and the attached image, audio and information material. The use of information published here is generally free of charge for personal information and editorial processing. Please clarify any copyright issues with the stated publisher before further use. In case of publication, please send a specimen copy to service@pressebox.de.