Record-Breaking Crowd at Synopsys Users Group
Synopsys CEO Aart de Geus Addresses More Than 2,000 Customers at EDA's Largest Users Group
This year, a record-breaking 2,032 users attended SNUG San Jose, a 29 percent increase in participants over SNUG 2007. The conference featured 40 technical presentations and 32 tutorials, plus demos, panels and vision sessions, all presented by more than 160 Synopsys users and experts to fellow design engineers. SNUG San Jose is the largest users group conference in electronic design automation (EDA) worldwide and one of the largest gatherings of design engineers in North America. In 2007, the global SNUG program drew more than 5,000 semiconductor and system design engineers to eight similar Synopsys user conferences in North America, Europe, Japan and Asia Pacific.
Low-power design and advanced design techniques using both 65 and 45nm processes were highlights of the three-day program. Low-power techniques were demonstrated in the areas of synthesis, place and route, IP and verification. Godwin Maben, Synopsys Principal Engineer and author of the popular low-power blog "Magic Blue Smoke," was the featured speaker for Tuesday's low-power general session.
Thomas T. Quan, Deputy Director, EDA & Design Service Marketing Program, TSMC, kicked off Wednesday's program with a general session on the TSMC reference flow (RF) for 45nm design success. The session addressed solving key 45nm design issues, such as power reduction, power integrity, statistical timing analysis and Design for Manufacturing (DFM), using the TSMC 8.0 RF.
The Best Paper, First Place, and Best First-Time Presenter awards went to the team of Srinath Atluri, Nimalan Siva and Anant Sakharkar of Cisco Systems, Inc., for "Migrating a Large-Scale Vera Testbench Infrastructure to SystemC and SystemVerilog - Risk Mitigation and Value Creation Strategies."
The Best Paper, Second Place, went to Nancy Pratt of IBM for "SystemVerilog Interfacing & Simulation Coverage: Are We There Yet?"
The Best Paper, Third Place, went to Venkata Chintapalli and Dan Steinberg of Integrated Device Technology for "OpenVera/RVM to SystemVerilog/VMM Conversion: How to Avoid 'Death By a Thousand Cuts.'"
The Technical Committee Award went to the team of Noah Aklilu of Cisco Systems, Inc., and Anthony Redhead of XtremeEDA Corp. for "Getting Synchronous Resets Right!"
There were two recipients of the Technical Committee's Honorable Mention Award: the team of Bingxiong Xu and Kevin Stiles of LSI Corp. for "Using NanoTime for Custom Digital Macros" and David Flynn of ARM, Ltd., for "Design for State Retention: Strategies and Case Studies."
"SNUG is a user-driven conference with high technical content," said SNUG San Jose Technical Chair Andy Copper of ARCH Design Solutions, Inc. "The melting pot of users, R&D and field engineers provides a unique environment to discuss current technical issues. The added excitement of seeing product previews and innovations gives the conference a technical edge and a look into the near future. Solutions are provided, ideas formed and challenging designs relished." Aart de Geus, chairman and chief executive officer at Synopsys, opened the conference with a keynote highlighting the evolution of customer designs and Synopsys' advances in power, performance and productivity. "When I look at the products that have come to market over the years, containing the chips that our customers have designed using Synopsys solutions, I am amazed at the progress that has taken place," said de Geus. "We are fortunate to work with companies with whom we can be a true partner, rather than merely a supplier. We have learned together that only this kind of real partnership enables us to provide our customers with the productivity solutions they need to succeed in such a competitive marketplace."
The SNUG global program is sponsored by leading semiconductor, IP and compute platform companies, including Platinum Sponsors ARM, Common Platform (Chartered Semiconductor Manufacturing, IBM, Samsung) and TSMC; Gold Sponsors HP, Sun Microsystems and Virage Logic; and Silver Sponsor UMC.
Synopsys, Inc. (NASDAQ:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
Synopsys and DesignWare are registered trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.