Picochip Achieves First Silicon Success for 40-nm picoXcel Femtocell Chip Using Synopsys' Lynx Design System
Integrated Galaxy-Enabled Design Flow Accelerates Migration to 40-nm Technology
"In the mobile communications market, each product generation requires higher performance and functionality at a lower cost. For Picochip to deliver this, it is essential that we are able to migrate process technololgies quickly and easily," said Will Robbins, vice president of silicon at Picochip. "Synopsys' Lynx gave us a robust Galaxy-based RTL-to-GDSII design flow, which we could configure to our specific technology needs. This gave us a head start over simply having a set of tools with which to build a design flow. It allowed us to tape out our first 40-nanometer chip, whilst saving us months of R&D effort."
Picochip is a leader in developing system-on-chip (SoC) solutions for the mobile communications infrastructure market, with an award-winning portfolio of cost- and performance-optimized silicon devices that change the way mobile networks are architectured. The PC3008 is the first in a family of devices that support the HSPA+ wireless broadband standard, delivering a low bill of material cost silicon device. It supports eight users with Release 9 HSPA+ (21Mbps downlink, 5Mbps uplink), incorporating Picochip's field-proven robust PHY and a 1GHz ARM11(TM) processor with TrustZone®.
The Lynx Design System is a complete chip design environment that includes a production-proven design flow enabled by Galaxy tools with innovative visualization capabilities to help create and track designs throughout the implementation cycle. Picochip adopted Lynx to mitigate the cost and risk of creating and maintaining a new production flow for its first 40-nm design and to meet an aggressive project schedule. Using Lynx, Picochip's engineers were able to immediately focus on optimizing the new design to meet both their 1GHz performance target and aggressive development cycle.
"The Lynx Design System offers tangible benefits for design teams looking to reduce the cost and risk of migrating to new technology processes," said John Koeter, vice president of marketing for IP and systems at Synopsys. "By enabling designers to implement chips more efficiently without sacrificing quality of results, and attacking total cost of design through systematic design flow management, leading design companies like Picochip are able to focus on what they do best - delivering differentiated design solutions in a competitive marketplace."
Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.