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Oticon Tapes Out Innovative Hearing-Aid DSP Using Synopsys IC Compiler
IC Compiler Enables Extremely Low-Power Design for Innovative Medical Device
"Battery life is one of our customers' major concerns. Taking advantage of IC Compiler's automatic multi-voltage, MTCMOS shutdown, and multi-threshold capabilities, we were able to meet our extreme low-power requirements and deliver new innovation to our hearing aid users," said Mogens Balsby, director of IC Design at Oticon. "Because we were moving to a new, advanced technology node and time-to-market was critical, we used Synopsys' Pilot tapeout-proven design environment, which includes full implementation, formal checking, and physical verification and leverages best-in-class tools. We were extremely satisfied with the results achieved with IC Compiler and the Pilot Design Environment on our complex design."
Oticon is the world leader in the design, development, and manufacture of hearing aids that embed sophisticated integrated circuits (ICs) that deliver massively parallel, digital audio signal processing and wireless communication. The new DSP's breakthrough real-time wireless technology enables two hearing aids to work together to process sound, similar to the way the brain receives input from two ears, to deliver three-dimensional auditory information that enhances the user's listening experience.
"IC Compiler's automated low-power optimization technology was instrumental in helping Oticon meet its low-power requirements, and Synopsys' Pilot Design Environment enabled them to complete their tapeout on schedule," said Antun Domic, senior vice president and general manager of Synopsys' Implementation Group. "As Oticon continues creating innovative products for their customers, it can leverage more of the advanced capabilities in IC Compiler, such as concurrent hierarchical design, for further product differentiation and faster time-to-results."
About IC Compiler
IC Compiler is Synopsys' comprehensive physical design solution. It provides superior results and faster time-to-results by extending physical synthesis to full place-and-route, and by enabling signoff-driven design closure. Older solutions have a limited horizon because placement, clock tree, and routing are separate, disjointed operations. IC Compiler's XPS technology breaks down the walls between these steps by extending physical synthesis to full place-and-route. IC Compiler has a unified, TCL-based architecture that implements innovations and harnesses some of Synopsys' best core technologies. It is a comprehensive physical design system with the features necessary to implement next-generation designs, including physical synthesis, design planning, placement, routing, timing, signal integrity (SI) optimization, power reduction, design-for-test (DFT), and yield optimization.
IC Compiler is part of the Eclypse Low Power Solution, which is a comprehensive alignment of low power design and verification technologies, IP, methodologies and services built on industry standards.
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