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PLS's UDE 5.0 with hypervisor awareness supports development of virtualized applications
Extensive new functions simplify debugging of various high-end SoCs
At present there is a trend to consolidate multiple applications, which in the past used separate hardware, on a single computing platform. However, different requirements in terms of safety, security and real-time behavior demand strict isolation, which can only be achieved by virtualization. With the hypervisor awareness, the developer can now use the extensive debug capabilities of the UDE for the development of virtualized applications too. Specific features of the ARM Cortex-A53, such as two-stage address translation or the support of virtual interrupts are handled transparently for the users. The hypervisor awareness of UDE enables the user to debug a bare-metal application as usual and as if it was running on real hardware instead of being encapsulated within a virtual machine (VM). If required, UDE provides also support for debugging and system analysis of the hypervisor itself. For each individual VM, both the state and the contexts can be displayed. In addition, information about the memory layout of the individual VMs as well as the mapping of the virtual memory addresses to physical memory addresses is provided by UDE.
Handling of large quantities of recorded trace data has been further simplified and improved in the UDE 5.0. Special attention was paid to visualization. For example, the time-accurate display of the executed functions and operating system tasks in the UDE Execution Sequence Chart can now be sorted and filtered according to different criteria. Links allow an easy navigation from the recorded functions to their source code. In combination with the add-in for the support of real-time operating systems according to the OSEK (Open Systems and their Interfaces for the Electronics in Motor Vehicles) standard, the operating system tasks and associated runnables can be clearly displayed and measured. An export function for the Best Trace Format (BTF) also allows further processing using popular third-party task analysis tools.
As a true multicore debugger, the UDE 5.0 also supports the visualization of the states and control of all cores of a multicore system within a uniform user interface. Even more efficient than before, for example, is the handling of variables that the compiler made it visible only for one specific core. In the watch windows of UDE such core-local variables are now separated by different colors according to the respective core. Until now this coloring was only applied to windows assigned to a specific core and for status information of the individual cores.
The UDE 5.0 also features numerous improvements and enhancements in terms of supported microcontrollers. Debug functions for 64-bit architectures, for example for the ARM Cortex-A53, have been consistently expanded. The ARM Cortex-R52 32-bit processor and the NETX 90 Cortex-M microcontroller have been added as completely new devices from the ARM world. The UDE 5.0 also offers dedicated debug support for the new PowerArchitecture-based Chorus SPC58NH92x devices from STMicroelectronics and the MPC5775B/MPC5775E microcontrollers from NXP. The latter MCUs target automotive and industrial battery management and inverter applications that require advanced performance. UDE’s Nexus trace support is available also for these devices and provides extensive functions for exact run-time analysis such as profiling, code coverage and the visualization of call graphs.
In particular, the microcontrollers of Infineon’s TC3xxx family benefit from the extended debug and trace functions of UDE 5.0. In addition to the multicore debug functions and depending on the specific controller, trace support is available for non-invasive debugging and system analysis: For the TC35x the new MCDSlight and for the TC38x the basic trace functionality of miniMCDS. The latter is also available to the developers in the basic license of the UDE.
A special multi-AURIX adapter is now available for target communication with the Universal Access Device 3+ (UAD3+). That adapter was developed by PLS in order to meet the special requirements of fail-safe and fail-operational systems, which provide redundancy based on two AURIX devices with two separate debug interface. Together with the UDE 5.0, the adapter allows fully synchronized stop-mode debugging: break, single-step operation and restart – as well as synchronous stopping of the peripheral units of both microcontrollers.
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