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PLS Programmierbare Logik & Systeme GmbH Straße der Freundschaft 92 02991 Lauta, Germany http://www.pls-mc.com
Contact Mr Mario Cupelli +49 681 926130

PLS and HighTec present completely new toolchain for Power Architecture SoCs from STMicroelectronics and Freescale

GNU and Eclipse based 'Power Architecture Development Platform'

(PresseBox) (Lauta / Saarbrücken (Germany), )
PLS Programmierbare Logik & Systeme and HighTec EDV-Systeme present a completely new common development environment for Power Architecture e200 core based SoCs from STMicroelectronics and Freescale at electronica 2010 in Hall A6, Booth A6.442 (PLS) and Booth A6.S04 (HighTec).

Key elements of the 'Power Architecture Development Platform', developed both for automotive and for demanding industrial applications, are the GNU technology based compiler from HighTec and the Universal Debug Engine (UDE) from PLS, which thanks to an own Eclipse perspective offers users cross debugger functionality, without any restrictions, in an Eclipse based development environment.

The GNU compiler can generate both standard PowerPC instructions and Variable Length Encoding (VLE) instructions that are important for Power Architecture based SoCs. The latter ensure a high code density. Since the development environment automatically selects the corresponding startup code, the necessary hardware initialization, the memory mapping as well as the right peripheral specific header file supplied, own or sample applications for all microcontrollers of the SPC56 family from STMicroelectronics and the MPC55xx and MPC56XX families from Freescale can be generated in Eclipse. With the appropriately prepared target configuration files, these applications can be run immediately on the respective evaluation boards of the manufacturer.

The Eclipse perspective of the Universal Debug Engine (UDE) supports the GNU compiler with a number of debug functions that go far beyond the standard scope of the C/C++ Development Tooling (CDT) from Eclipse. The most important functions include, for example, continuous updating of target data in the debugger window even when a program is running, presentation of the extensive peripheral registers in textual or symbolic form as well as the visualization of trace data. Furthermore, the UDE perspective also allows the control of several debugger instances and thereby unrestricted multicore debugging.

The UDE is complemented with the powerful Universal Access Device family (UAD2+/UAD3+) from PLS, which extensively supports both debugging via a JTAG interface and the Nexus port that is nowadays typically used for program and data trace. With the UAD3+ up to 4 GB of memory are available for trace recording, whereby the recorded data from the UDE software are not only used to display the program flow, but also for system debugging functions such as code coverage and profiling measurements. Moreover, transfer rates of up to 1 MByte/s via JTAG not only ensure a fast flash programming, but also short turn-around times during development.

HighTec EDV-Systeme GmbH

Founded in 1982, HighTec EDV-Systeme GmbH offers services and products for the development of embedded systems. The adapted GNU-based compiler systems from HighTec are available as Eclipse development environment for TriCore, Power Architecture and Cortex. For these architectures with a Memory Protection Unit (MPU), the real-time operating system PXROS-HR with its optimal MPU management opens up new possibilities with regard to safe function integration, modular testing, reliability and certification of applications. Further information about HighTec's products can be found on the company's website at www.hightec-rt.com.

PLS Programmierbare Logik & Systeme GmbH

PLS Programierbare Logik & Systeme GmbH, based in Lauta, Germany, was founded in 1990 by Thomas Bauch and Dr. Stefan Weisse. With its innovative modular test and development tools, the company has demonstrated for almost two decades its position as an international technology leader in the field of debuggers, emulators and trace solutions for 16-bit and 32-bit microcontrollers. The software architecture of the Universal Debug Engine (UDE) guarantees optimal conditions for debugging SoC-based systems. For example, by means of the intelligent use of modern on-chip debugging and on-chip trace units, valuable functions such as profiling and code coverage are available for the system optimization. Furthermore, the associated Universal Access Device 2 (UAD2) product family, with transfer rates of up to 3.5 MBytes/s and a wide range of interfaces, offers entirely new dimensions for fast and flexible access to multi-core systems. Important architectures such as TriCore, PowerArchitecture, SH 2A, XC2000/XE166, ARM, Cortex, XScale and C166/ST10 as well as simulation platforms of different vendors are supported. For further information about the company, please visit www.pls mc.com.

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The publisher indicated in each case (see company info by clicking on image/title or company info in the right-hand column) is solely responsible for the stories above, the event or job offer shown and for the image and audio material displayed. As a rule, the publisher is also the author of the texts and the attached image, audio and information material. The use of information published here is generally free of charge for personal information and editorial processing. Please clarify any copyright issues with the stated publisher before further use. In case of publication, please send a specimen copy to service@pressebox.de.