PLS' Universal Debug Engine 4.4 simplifies testing and debugging highly complex heterogeneous multicore SoCs

Significantly enhanced range of functions and optimized data visualization

Lauta (Germany), (PresseBox) - PLS Programmierbare Logik & Systeme is presenting its Universal Debug Engine (UDE) 4.4 for the first time at embedded world 2015 in Hall 4, Booth 4-310. The UDE 4.4 features significantly enhanced debugging procedures for complex system-on-chips (SoCs) with heterogeneous controller cores, optimized data visualization in system-level debugging as well as dedicated support of a wide range of state-of-the-art 32-bit multicore SoCs of different manufacturers.

Control of the respective multicore SoCs and their debugging is carried out with the UDE 4.4 within a specifically optimized user interface. Various colors determinable by the user and even definable groups of views for individual function units ensure a fast overview and simple navigation, also in complex devices. Both separate and synchronized control of the active units is optionally possible.

The different on-chip debug logic of the chip architectures is fully supported and the UDE offers the user a vendor-independent, and at the same time, a consistent user interface. Among other things, with the UDE 4.4 trace data streams can now be stored in a databank and thus used for later offline analysis. Furthermore, measurement results can be automatically accumulated for carrying out code coverage measurements with limited on-chip trace memory. In order to enable branch coverage measurements on highly optimized code, the UDE 4.4 defines an enhancement of the DWARF standard, freely available for all compiler manufacturers. In addition to the presentation of variables at runtime of the program, a similar presentation based on data trace is also possible.

With PLS' Universal Access Device 3+ (UAD3+), a powerful hardware tool with 4 GB external trace memory is available for recording external trace data. Thanks to an Aurora trace pod supporting four serial high-speed lanes each with up to 3.25 gigabit per second (Gbit/s) transfer rate, the UAD3+ is also well equipped to meet future requirements.

In particular, in the areas of trace data analysis, macros and multicore breakpoints, the object model of the UDE, which serves for test automation and interaction with other tools, is also significantly enhanced. This feature-rich and flexible software interface of the UDE is used by further external tools for target access, flash programming and target control. These include PikeTec's time partition testing (TPT) for model-base testing as well as the UML debugger from LieberLieber Software, which offers debugging on the UML model level as an option for Enterprise Architect / Embedded Engineer.

Microcontrollers (MCUs) newly supported by the UDE 4.4 include Infineon's AURIX family (TC29x, TC27x, TC26x, TC23x and TC22x including Emulation Devices), Freescale's Qorivva MPC57XX family (MPC5746M, MPC5777M, MPC5748G, MPC5746C, MPC77xK and MPC574xP) as well as STMicroelectronics SPC57x family. With these families of MCUs, programs for the integrated Generic Timer Module (GTM) and Hardware Security Module (HSM) can also be debugged. Furthermore, the Infineon TLE986x Embedded Power ICs, the STMicroelectronics STM32Fx Cortex-M based devices as well as the Xilinx Zynq-7000 family are also fully supported.

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pls Programmierbare Logik & Systeme GmbH

PLS Programierbare Logik & Systeme GmbH, based in Lauta, Germany, was founded in 1990. With its innovative modular test and development tools, the company has demonstrated for over two decades its position as an international technology leader in the field of debuggers, emulators and trace solutions for 16-bit and 32-bit microcontrollers. The software architecture of the Universal Debug Engine (UDE) guarantees optimal conditions for debugging SoC-based systems. For example, by means of the intelligent use of modern on-chip debugging and on-chip trace units, valuable functions such as profiling and code coverage are available for the system optimization. Furthermore, the associated Universal Access Device (UAD2/UAD3+) product family, with transfer rates of up to 3.5 MBytes/s and a wide range of interfaces, offers entirely new dimensions for fast and flexible access to multicore systems. Important architectures such as TriCore, Power Architecture, XC2000/XE166, ARM, Cortex, SH-2A, XScale and C166/ST10 as well as simulation platforms of different vendors are supported. For further information about the company, please visit www.pls mc.com.

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