Corelis has released two DDR3 ScanDIMM modules which provide interconnect testability solutions for DDR3 sockets. Inserting the ScanDIMM into the DIMM socket of a UUT results in placing a fully bi-directional boundary-scan cell behind each pin of the DIMM connector, increasing the test coverage to include not only data and address signal pins, but also clock, control, and all power and ground pins. Utilizing this improved cell architecture, test pattern generation tools, such as Corelis' ScanExpress TPG, can apply the most optimal diagnostic algorithms to clearly isolate any failure under investigation.
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