To accelerate the IC design process and improve their customers’ productivity, LFoundry based its PDK on the latest Cadence Virtuoso technologies IC 6.1.3 and MMSIM 7.1 (Multi-Mode Simulation). Ensuring silicon accurate analog designs and to guarantee a maximal throughput during verification, LFoundry included parallel simulators such as Virtuoso APS, and Fast SPICE Simulator UltraSim. In addition to support for the industry standard custom layout features, the PDK also supports advanced interactive and automation technologies such as design rule driven design, Virtuoso XL, and Virtuoso Space-based Router (VSR) to provide additional productivity gains for layout designers.
For the physical verification and final manufacturability sign-off, LFoundry deployed Cadence Assura which includes design rule check and layout vs. schematic verification and QRC for the parasitic , extraction, all to enable its customers to achieve first time right silicon.
„For the development of this state-of-art PDK it was extremely important for us to support the most advanced technologies available on the market in order to help improve our customers’ productivity,” said Michael Lehnert CEO of LFoundry. “We will continue to support Cadence’s tools for further enhancements of this PDK including RF and HV (high voltage) features to be released in the next months.”
LFoundry announced last February, a monthly Multi Project Wafer (MPW) service to enable their customer low cost access to the market with special incentives to selected customers requesting participation on the MPW services through to July 2009.