Synopsys new ultra low-power non-volatile memory IP cuts power by 90 percent and size in half
Highlights: Synopsys DesignWare AEON Multiple-Time Programmable Ultra Low-Power Non-Volatile Memory IP optimised f…
Highlights: Synopsys DesignWare AEON Multiple-Time Programmable Ultra Low-Power Non-Volatile Memory IP optimised f…
. - Optimised for high efficiency, low power embedded automotive applications - Automotive Safety Integrity Level D (…
. - Complete portfolio of data converter IP includes high speed and general purpose ADCs and DACs - New successive ap…
Highlights - First collaboration milestone speeds validation of IP and design correlation on UMC's 14nm FinFET proces…
. - Synopsys® and ARM extend collaboration agreement to include ARM® Fast Models of ARMv8 processors - Synopsys VDK F…
. - Includes proven implementation and manufacturing tools, as well as IP for designing with FinFET devices - In prod…
. - Milestone helps accelerate adoption of FinFET technology for faster and more power efficient Systems on Chips (SoC)…
. - Up to 3x improvement in system prototype performance enabled through enhanced HapsTrak® 3 I/O connector technology…
. - Synopsys expands its industry-leading DesignWare® DDR Memory Interface IP family to include support for DDR4 SDRAMs…
. - Full line of 28-nm DesignWare IP includes PHYs for USB, PCI Express, SATA, HDMI, DDR, MIPI, as well as data convert…