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TI introduces high-performance 16-bit, 800 MSPS dual-channel digital-to-analog converter for 3G and 4G communications
The DAC5688 expands on TI's portfolio of full-featured DACs and represents a 67 percent space reduction over the previous generation. Offered in a space-saving 64-pin 9 mm x 9 mm QFN package, the DAC5688 features enhanced performance to support existing 3G applications, including WCDMA and TD-SCDMA, and emerging 4G applications, including WiMAX and LTE. For instance, for an output frequency of 70 MHz, the device achieves 81 dBC ACLR for a single-carrier WCDMA application.
To further enhance performance in communications design, the DAC5688 allows for more exact frequency placement, superior linearity, noise crosstalk and PLL phase noise performance. An optional frequency mixer with a 32-bit numerically controlled oscillator (NCO) runs up to 800 MHz, enabling more exact frequency placement. A digital inverse SINC filter compensates for natural DAC sin (x)/x frequency roll-off. In addition, the digital quadrature modulator correction (QMC) feature allows IQ compensation of phase, gain and offset to maximize sideband rejection to create a flatter pass band. An integrated 2x-32x clock multiplying PLL/VCO offers lower jitter and four times the multiplying range over the DAC5687. This extended range can enable designers to operate with simpler external clocking, reducing complexity and cost.
To increase flexibility, the DAC5688 dual CMOS data bus provides 250 Mbps input data transfer per DAC channel. Several input data options are available including dual-bus data, single-bus interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock, which eases interface timing. Input data can be interpolated two, four or eight times by on-board digital interpolating FIR filters with greater than 80dB stop-band attenuation.
Tools, support and signal chain solutions ease design TI offers a suite of easy-to-use evaluation modules (EVMs) and tools to speed development time. With the inclusion of the TRF3703 single-chip quadrature modulator and CDCM7005 clocking distribution chip, the DAC5688 EVM allows for rapid prototyping of high performance, space efficient, transmit signal chain solutions. In addition, the TSW3100 digital pattern generator's CMOS outputs provide an evaluation platform to enable designers to realize the increased system performance provided by the new device's wide bandwidth, including the following:
- Improved power amplifier linearization for digital pre-distortion (DPD)solutions with TI's GC5322 single-chip transmit processor solution
- Reduced cost of infrastructure, covering wide bandwidth with one implementation
- Implementation of more standards in software-defined radios
- Advanced system performance for test and measurement
To further simplify design, reduce development costs and speed time to market, TI offers a wide variety of devices to complete the signal chain, including operational amplifiers (OPA695) and an integrated PLL/VCO (TRF3761).
In addition to analog signal chain solutions, TI also provides a line of wireless infrastructure DSPs including single and multi-core devices and wireless air interface specific software libraries. TI leads the industry in deployment with the top eight 3G base station manufacturers using TI products. For more information on TI's complete wireless infrastructure solutions, please visit www.ti.com/wi.
Pricing and availability The DAC5688 is available now in 64-pin quad flat no-lead (QFN) package and is priced at $29.95 in 1,000-piece quantities (suggested resale pricing).
Samples and EVMs are available from www.ti.com/dataconverters
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