40 Percent Faster Runtime and Enhanced High-Performance Core Design Capabilities Drive Adoption of Magma's Latest Talus 1.2 IC Implementation Platform
Leading semiconductor suppliers worldwide have deployed Talus 1.2 into production flows for the most challenging designs
The tool-of-choice for many leading semiconductor suppliers, Talus has already been used for multiple 28- and 20-nanometer (nm) tapeouts. It is particularly effective on designs with a large number of timing modes and sign-off corners. Recently, a key Magma customer was able to implement a challenging 28-nm, 3.5-million-instance SoC top level design with 12 sign-off scenarios in less than 3 days - with full composite current source (CCS) models, multi-mode, multi-corner (MMMC) and crosstalk analysis enabled. Seamless integration of Talus' implementation and sign-off engines also shortened final sign-off runtime and significantly reduced the number of ECO cycles.
"A key component of Magma's Silicon One technology solutions, Talus was architected to increase designer productivity, improve quality of results and reduce the development costs of advanced-node designs," said Premal Buch, general manager of Magma's Design Implementation Business Unit. "The rapid rate of adoption by leading semiconductor companies worldwide indicates that Magma is delivering the innovative technology needed to address today's toughest design challenges."
Talus 1.2: Faster Turnaround Times, Superior Results
Key enabling technologies in Talus 1.2 include the Talus MX timing and extraction engines based on underlying technology borrowed from Magma's next-generation sign-off timer, Tekton(TM) , and sign-off extractor, QCP(TM) . Used consistently throughout Talus 1.2's RTL-to-GDSII flow, these analysis engines are fast, accurate and have significantly higher capacity. They offer new features such as advanced on-chip variation (AOCV) and MMMC analysis, ensuring tight timing correlation throughout the flow. When combined with Tekton and QCP, Talus 1.2 provides sign-off-accurate analysis during implementation, eliminating timing ECOs and resulting in faster design closure.
For implementation at 28 nm and below, it's not uncommon for designs to require the analysis of many different timing scenarios. Magma defines timing scenarios as the number of process corners multiplied by the number of timing modes. Most solutions can only handle five to eight scenarios during implementation. Talus 1.2 performs concurrent MMMC on a single machine and can manage five times more scenarios than traditional solutions, while improving runtime by 10 times.
For high-performance core design Talus 1.2 features significantly enhanced full-flow hold-corner planning and management to counter high OCV margins at smaller nodes. Combined data and clock optimization ensures robust multi-corner clocks are maintained throughout the flow, simplifying final closure and avoiding ECO congestion.
Talus 1.2's routing technology addresses routing challenges at 28 nm and below, where managing crosstalk in particular becomes more difficult. Fixing crosstalk too late in the flow results, at best, in higher cell area and elevated leakage. In the worst case, it results in a design that will not close. Talus1.2 avoids this by identifying and controlling crosstalk throughout implementation, providing a much more convergent flow with far fewer timing surprises. Unlike other approaches, Talus 1.2 delivers far shorter runtimes and more robust designs, without increasing area and leakage.
For more information, download the white paper "Addressing 32/28-nm IC Implementation Challenges with Talus Vortex and Talus Vortex FX" from the Magma website at: www.magma-da.com/resources (requires registration).
Magma and Talus are registered trademarks and QCP and Tekton are trademarks of Magma Design Automation Inc. All other product, company and institution names are trademarks or registered trademarks of their respective owners.
Except for the historical information contained herein, the matters set forth in this press release, including statements about the features and benefits of Magma products, are forward-looking statements within the meaning of the “safe harbor” provisions of the Private Securities Litigation Reform Act of 1995. These forward-looking statements are subject to risks and uncertainties that could cause actual results to differ materially including but not limited to the ability of Magma’s products to produce the desired results and the company’s ability to keep pace with rapidly changing technology. Further discussion of these and other potential risk factors may be found in Magma's public filings with the Securities and Exchange Commission (www.sec.gov) . The company undertakes no additional obligation to update these forward-looking statements.
Leading semiconductor companies worldwide use Magma's electronic design automation (EDA) software to produce chips for a wide variety of vertical markets including tablet computing, mobile devices, electronic games, digital video, networking, military/aerospace and memory. Silicon One, Magma's technology solutions for emerging silicon, address time to market, product differentiation, cost and performance while making silicon more profitable. Magma products include software for digital design, analog implementation, mixed-signal design, physical verification, circuit simulation, characterization and yield management. The company maintains headquarters in San Jose, Calif., and offices throughout North America, Europe, Japan, Asia and India. Magma's stock trades on Nasdaq under the ticker symbol LAVA. Follow Magma on Twitter at www.Twitter.com/MagmaEDA and on Facebook at www.Facebook.com/Magma. Visit Magma Design Automation on the Web at www.magma-da.com
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