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Microsemi Unveils New High-Performance Clock Management Semiconductor Timing Solutions
Clock Generators Feature Low Jitter, Low Power and NCO in a Small Package
"With our new clock generators, designers no longer need to rely on expensive oscillators to get high speed output clocks with outstanding jitter performance, flexibility and dependable performance," said Maamoun Seido, vice president and business unit manager of Microsemi's timing products. "The addition of these new generators, coupled with the launch of our first clock buffer family last year, further solidifies our leadership position in timing and synchronization semiconductor solutions. This market segment remains a key area of focus and investment for Microsemi."
Market research firm Databeans estimates the clock generation integrated circuit market to be over $700 million in 2012.
Traditionally, fundamental speed oscillators have a limitation in the range of 50 megahertz (MHz) and third overtone options have a limitation in the range of 150 MHz. Designers depend on analog phase locked loops (APLLs) to multiply low frequency signals and generate the desired high frequencies. The quality of the output signal depends on the performance of the APLL. To achieve high performance, designers are forced to use high cost APLLs, as high performance drives a higher APLL cost.
Microsemi's new, small footprint, high-performance clock generators can generate high frequency output clocks with very low jitter, low power consumption. The dual-channel or single-channel variants feature numerically controlled oscillators (NCO) that can generate any frequency with fine tunability of 0.1ppb (parts per billion). The new clock generators improve reliability, simplify product development efforts, lower bill-of-material costs and are well-suited for cost-sensitive applications with high performance requirements.
Microsemi's ZL30240 and ZL30241 feature several key attributes including:
- Two to four independently programmable outputs with support for multiple frequencies (up to 940 MHz) and multiple signal formats to facilitate flexible rate conversions;
- Up to two synthesizers enabling the concurrent use of two independent frequency families;
- Jitter as low as 0.27 picoseconds (rms), meeting tight jitter budgets of PHYs;
- Low power consumption (less than 300 milliwatts per channel); and
- Space- and cost-savings 7 x 7 millimeter package.
Microsemi is a market leader in network synchronization and offers an industry-leading portfolio focused on timing solutions for packet networks (SyncE and IEEE1588) and optical transport network (OTN) systems. The company offers a complete portfolio of timing products for high-performance network synchronization including digital phase locked loop (DPLL) solutions to drive network clocks, as well as analog and mixed-signal timing ICs to meet performance requirements for up to 10G/40G interfaces. Microsemi's clock management solutions include clock generators and synthesizers, clock fanout buffers, and rate conversion jitter attenuators that allow product developers to simplify system and board design.
Microsemi and the Microsemi logo are registered trademarks or service marks of Microsemi Corporation and/or its affiliates. Third-party trademarks and service marks mentioned herein are the property of their respective owners.
"Safe Harbor" Statement under the Private Securities Litigation Reform Act of 1995: Any statements set forth in this news release that are not entirely historical and factual in nature, including without limitation statements related to its new clock generators, and its potential effects on future business, are forward-looking statements. These forward-looking statements are based on our current expectations and are inherently subject to risks and uncertainties that could cause actual results to differ materially from those expressed in the forward-looking statements. The potential risks and uncertainties include, but are not limited to, such factors as rapidly changing technology and product obsolescence, potential cost increases, variations in customer order preferences, weakness or competitive pricing environment of the marketplace, uncertain demand for and acceptance of the company's products, adverse circumstances in any of our end markets, results of in-process or planned development or marketing and promotional campaigns, difficulties foreseeing future demand, potential non-realization of expected orders or non-realization of backlog, product returns, product liability, and other potential unexpected business and economic conditions or adverse changes in current or expected industry conditions, difficulties and costs of protecting patents and other proprietary rights, inventory obsolescence and difficulties regarding customer qualification of products. In addition to these factors and any other factors mentioned elsewhere in this news release, the reader should refer as well to the factors, uncertainties or risks identified in the company's most recent Form 10-K and all subsequent Form 10-Q reports filed by Microsemi with the SEC. Additional risk factors may be identified from time to time in Microsemi's future filings. The forward-looking statements included in this release speak only as of the date hereof, and Microsemi does not undertake any obligation to update these forward-looking statements to reflect subsequent events or circumstances.
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