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Free Keithley Web-Based Seminar Explores Parallel Wafer Level Reliability Testing
Parallel wafer level reliability (WLR) testing provides a tool to accelerate throughput significantly by providing statistically significant samples sooner. New parallel WLR test solutions offer throughput benefits for both traditional and advanced WLR measurements. WLR tests are commonly performed throughout the semiconductor lifecycle-from technology development and process integration to process reliability monitoring. The speed and accuracy of these tests impact the time to market for new device designs. This seminar examines the benefits and tradeoffs associated with parallel test solutions for WLR.
Seminar participants will learn how to estimate the speed and throughput impact of parallel WLR testing on traditional reliability structures and how to assess traditional test structures for use in a parallel test system. The seminar will also address the source of measurement errors that impact WLR measurements, as well as typical configuration, measurement, and optimization techniques.
This webinar is recommended for engineers who are new to semiconductor reliability testing, test engineers who need to accelerate WLR testing, and QRA lab managers.
Dave Rose is a senior staff applications engineer at Keithley Instruments, Inc. in Cleveland, Ohio, which is part of the Tektronix test and measurement portfolio. Dave joined Keithley in 1987 and has spent roughly half of his career in design engineering and the other half in applications engineering.
For More Information
To register to participate in the online seminar, which will be broadcast on Thursday, January 26, at 15:00 CET (9:00 AM EST) for the Europe audience and at 2:00 PM EST for the North America audience, visit http://www.keithley.info/ParallelWLRTest.
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