iSYSTEM AG and Timing-Architects Embedded Systems GmbH: Tool-based Multi-Core Performance Engineering

Trace-based performance analysis tools integrated with model-based timing optimization tools for an efficient migration from single- to multi-core embedded systems

(PresseBox) ( Schwabhausen/Regensburg, )
Today iSYSTEM AG and Timing-Architects Embedded Systems GmbH are announcing the availability of a tool chain that enables continuous and automated software development of multi-core embedded systems. The cooperation of the two companies provides the answer to the question of how to efficiently and without risk migrate from single- to multi-core embedded systems.

Key of the whole process is an integrated approach consisting of runtime measurements on hardware level and model-based optimization. This allows for an automated and precise model generation and a continuous comparison as well as adjustment of model and real target based on hardware traces.

The time has come! Multi-core microcontrollers are becoming first choice for future embedded system developments. Reasons are, among others, an increasing demand on performance and reliability of such systems. This is accompanied by continually increasing software complexity, and therefore growing development effort and time. Engineers are facing new challenges in terms of timing, data dependencies, performance, and reliability requirements, which need to be considered as early as possible in the development process of software.

Using the innovative simulation and optimization tools (TA Tool Suite) of Timing-Architects it is possible to improve the performance as well as the reaction times of embedded multi-core systems. With the TA Tool Suite embedded systems are developed efficiently and therefore cost effective.

The TA Simulator of Timing Architects allows evaluating the real-time requirements before and during the development of software for embedded multi-core systems using a model-based approach. With the TA Optimizer manual and error-prone development decisions, e.g. the distribution of functions to the individual cores of multi-core processors, are performed and evaluated automatically. Time-consuming development iterations (re-design) are eliminated and the number of costly hardware tests is drastically reduced. The development process is faster, more flexible and cost-efficient. In addition, the hardware resource utilization, essentially the processor and memory resources, is precisely investigated and optimized. This is often the key to the development of multi-core systems and avoids project escalations.

"We are really excited about the multi-core and process know-how of the Timing Architects team and how this is implemented in the TA Tool Suite. Finally, there is an answer to the many questions about the transition of embedded software from single-to multi-core embedded systems. The connection of the two tool chains using the Timing Architects TA Inspector to utilize the iSYSTEM trace technology for the verification of models ensures that the link to the real target is not lost by a too high abstraction. Another milestone of the iSYSTEM connectivity strategy along the embedded development and test process is put into practice," states Erol Simsek, CEO of iSYSTEM AG.

"Our customers will benefit from a comprehensive tool chain for the entire development process through the already proven interface of the two solutions. In multi-core series projects developers are supported, for example, by using the model-based analysis of the TA tools to highlight relevant or critical scenarios which can be reproduced later on the real target by using the iSYSTEM tools for debugging and tracing. The modeling and thus the model-based optimization benefit from the automatic enrichment of the architecture description by dynamic run-time characteristics. In addition, a tight coupling allows fast iterations in an agile development. Therefore, users can now leverage design and verification possibilities to master the complexity of multi-core systems." states Dr. Michael Deubzer, CEO and CTO of Timing Architects Embedded Systems GmbH.

Both companies are currently working together at the ZIM funded project ZELOS ³. ZELOS ³ has the goal to develop appropriate methods, processes and techniques to implement safe and reliable embedded systems according to ISO 26262 with the help of multi-core processors. The Technical University of Regensburg with its "Laboratory for Safe and Secure Systems' "(LaS ³), iSYSTEM and Timing Architects will develop new and robust multi-core scheduling algorithms which integrate fault tolerance mechanisms (e.g. SES) directly into the scheduling and thus enhance the security and reliability of an embedded system. For evaluation, the system is investigated by means of simulated fault injection. The multi-core debugging and tracing allows - also by means of error injection - to close the gap to verify the results on real target hardware. The areas of knowledge and tools of all partners connect here smoothly. The first results of this project have been incorporated directly into the available tool chain.

For more information visit

Background information: Multi-core embedded software development

The growing demand for more sophisticated functions (such as Active Driver Assistance) and the rising safety and reliability requirements are some of the indicators that multi-core processors will lay the ground for the future development of embedded systems. The proportion of multi-core processors in 2012 was at about 21% with an expected annual growth of 30% [1]. Multi-core processors are superior to single-core processors in computing performance and energy efficiency. Nevertheless, for migration to multi-core technology dramatically increases of development efforts are expected due to the growing complexity of the software. Because of that the development cost is expected to rise by a factor of 4.5 and an increase of staffing needs by a factor of 3. This hike in complexity of the systems is based on new effects like the simultaneous access of different cores to shared resources. To counteract the complexity, intelligent and efficient tools and tool chains must be used to support the developers throughout the development process from the design of the development up to the test phase. Through the model-based approach early on during the design phase, the Timing Architects and iSYSTEM tools can analyze and optimize the targeted embedded system and thereby eliminating further iteration steps during the development phase. By the close interfacing of the Timing Architects and iSYSTEM tools the seamless transition of the individual phases of development is given. Based on non-invasive generated trace data (and the automated generated models) the created abstract system model of the simulation can be verified. This is particularly important in the development of safety-critical real-time embedded systems since a holistic approach that integrates safety as well as timing requirements is essential.

Benefits and features of the continuous approach

- One holistic approach: effective and verified simulation tool for safety critical systems
- Automatic detection of discrepancies between model and implementation e.g. by comparison of evaluated requirements
- Reduction of development costs through early tool support to reduce test cycle times and implementation errors
- The tight coupling of simulation and verification on the real target hardware leads to increased quality and reliability of the development process and the final product

About Timing-Architects:

Timing-Architects (TA) is an internationally operating high-tech company, specialized in the optimization of software for embedded multi- and many-core real-time systems. For their innovative tool solution "TA Tool Suite" the company received multiple awards and is also recognized by experts as a leading player in research and development of multi-core embedded systems.

Timing-Architects Tool Suite covers the system design phase, simulation and analysis, architecture and module development, as well as target verification. Due to a connection of all modules, a closed loop solution is provided for the whole development process. With TA Designer, TA Simulation, TA Optimizer, and TA Inspector, Timing-Architects provides tools to support project managers, architects, developer, integration and test engineers to broaden the performance and increase the efficiency of their multi-core projects.

For more information visit
Für die oben stehenden Pressemitteilungen, das angezeigte Event bzw. das Stellenangebot sowie für das angezeigte Bild- und Tonmaterial ist allein der jeweils angegebene Herausgeber (siehe Firmeninfo bei Klick auf Bild/Meldungstitel oder Firmeninfo rechte Spalte) verantwortlich. Dieser ist in der Regel auch Urheber der Pressetexte sowie der angehängten Bild-, Ton- und Informationsmaterialien.
Die Nutzung von hier veröffentlichten Informationen zur Eigeninformation und redaktionellen Weiterverarbeitung ist in der Regel kostenfrei. Bitte klären Sie vor einer Weiterverwendung urheberrechtliche Fragen mit dem angegebenen Herausgeber. Bei Veröffentlichung senden Sie bitte ein Belegexemplar an