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Imec reveals method of damage free cryogenic etching of ultralow-k dielectrics

New method allows IC manufacturers to reach scaling levels at 20nm and beyond, without compromising speed and device cross-talk

(PresseBox) (Seniconwest, San Francisco (USA), )
Imec today announced a cryogenic etching method that protects the surface of porous ultralow-k dielectrics against excessive plasma induced damages.

As semiconductor technology scales below the 20nm node, the capacitance increases between nearby conductive portions of high-density integrated circuits, resulting in loss of speed and cross-talk of the device. To control the increase in capacitance in deeply-scaled devices, insulating layers of porous low-k dielectrics are integrated through plasma etching. However, plasma etching exposes the dielectrics to active plasma radicals that penetrate deeply into the porous substrate, which then react and change the composition of the dielectric.

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The publisher indicated in each case (see company info by clicking on image/title or company info in the right-hand column) is solely responsible for the stories above, the event or job offer shown and for the image and audio material displayed. As a rule, the publisher is also the author of the texts and the attached image, audio and information material. The use of information published here is generally free of charge for personal information and editorial processing. Please clarify any copyright issues with the stated publisher before further use. In case of publication, please send a specimen copy to service@pressebox.de.