Atrenta has announced that Fujitsu Semiconductor Europe has adopted its SpyGlass®-CDC product. Fujitsu will broadly deploy the tool to help reduce the design risks associated with its complex systemonchip (SoC) designs.
Early Design Closure solutions from Atrenta allow design capture, verification, optimisation and exploration early in the design flow at the register transfer language (RTL) stage, when it's faster and easier to correct problems and explore alternatives. This approach facilitates propagation of design efficiencies to detailed, backend implementation with minimised schedule risk.
Atrenta's SpyGlass-CDC product analyses SoC designs to ensure that complex clock synchronisation schemes, such as FIFOs and
Early Design Closure solutions from Atrenta allow design capture, verification, optimisation and exploration early in the design flow at the register transfer language (RTL) stage, when it's faster and easier to correct problems and explore alternatives. This approach facilitates propagation of design efficiencies to detailed, backend implementation with minimised schedule risk.
Atrenta's SpyGlass-CDC product analyses SoC designs to ensure that complex clock synchronisation schemes, such as FIFOs and
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