Freescale presents latest technology advancements at premier industry conferences

Papers highlight advanced semiconductor packaging and process technologies

(PresseBox) ( München, )
Freescale Semiconductor will present several technology papers at two key industry events. The 57th annual Electronic Component and Technology Conference (ECTC) will be held in Reno, Nevada, May 29 - June 1, 2007. The 10th annual IEEE Interconnect Technology Conference (IITC), sponsored by the IEEE Electron Devices Society, will be held in San Francisco, June 4 - 6, 2007. - At the two events, Freescale will present or co-present a total of 10 papers that highlight its recent research and development findings in redistributed chip packaging and process technology around high-K and the use of 3D technologies.

ECTC is acclaimed as the premier international packaging, components and microelectronic systems technology conference, striving to offer attendees an outstanding array of packaging technology information. Freescale's technical papers cover leading edge developments in advanced packaging, modeling and simulation, interconnections, materials and processing, quality & reliability and RF. For more information, visit .

The following is a list of papers Freescale plans to present at ECTC:

The Redistributed Chip Package: A Breakthrough for Advanced Packaging

High Performance RF MEMS Series Contact Switch - Design and Simulations

3D Multi Scale Modeling of Wire Bonding Induced Peeling in Cu/Low-K Interconnects:
Application of an Energy Based Criteria and Correlations with Experiments

Current Carrying Capability of Sn0.7Cu Solder Bumps in Flip Chip Modules for High Power Applications

Challenge of the Temperature Cycling Test for Enhanced Packages with Low-K/Cu Devices

A premier conference for interconnect technology, IITC provides a forum for professionals in semiconductor processing, academia and equipment development to present and discuss exciting new science and technology through oral presentations, poster displays, exhibit booths and supplier seminars. Freescale plans to present five papers including progress around using 3D technologies. For more information, visit

The following is a list of papers Freescale plans to present or co-present at IITC:

Technology and Design Cooperation: High-K MIM Capacitors for Microprocessor, IO, and Clocking

Progress of 3D-Integration Technologies and 3D Interconnects

Full Copper Electrochemical Mechanical Planarization (Ecmp) as a Technology Enabler for the 45 and 32-nm Nodes

Three Dimensional Chip Stacking using a Wafer-to-Wafer Integration

Robust Integration of an ULK SiOCH dielectric (k=2.3) for high performance 32nm node
Für die oben stehenden Pressemitteilungen, das angezeigte Event bzw. das Stellenangebot sowie für das angezeigte Bild- und Tonmaterial ist allein der jeweils angegebene Herausgeber (siehe Firmeninfo bei Klick auf Bild/Meldungstitel oder Firmeninfo rechte Spalte) verantwortlich. Dieser ist in der Regel auch Urheber der Pressetexte sowie der angehängten Bild-, Ton- und Informationsmaterialien.
Die Nutzung von hier veröffentlichten Informationen zur Eigeninformation und redaktionellen Weiterverarbeitung ist in der Regel kostenfrei. Bitte klären Sie vor einer Weiterverwendung urheberrechtliche Fragen mit dem angegebenen Herausgeber. Bei Veröffentlichung senden Sie bitte ein Belegexemplar an