EV Group (EVG) today announced a joint effort with Applied Materials, Inc. to develop wafer bonding processes for the manufacture of through-silicon vias (TSVs) in three-dimensional integrated circuit (3D IC) packaging applications. The two companies will be working together as members of the EMC-3D Semiconductor 3D Equipment and Materials Consortium.
Growing consumer demand for smaller, lower-power electronic devices with greater functionality is driving the need for TSV technology - a new approach to increase packaging density by vertically stacking chips. However, while conventional ICs use wafers approximately 750-um thick, 3D ICs require thinner wafers of about 100 um or less.
Growing consumer demand for smaller, lower-power electronic devices with greater functionality is driving the need for TSV technology - a new approach to increase packaging density by vertically stacking chips. However, while conventional ICs use wafers approximately 750-um thick, 3D ICs require thinner wafers of about 100 um or less.
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