BPM Microsystems to Demonstrate the 2800ISP at the Houston SMTA Expo

(PresseBox) ( Houston, Texas, )
BPM Microsystems announces that it will exhibit its award-winning 2800ISP parallel in-system device programmer at the Houston SMTA Expo, scheduled to take place March 14, 2013 at the Stafford Centre in Stafford, TX.

The new 2800ISP incorporates the company's 8th Generation site technology utilizing its Vector Engine Co-Processor® into a custom-designed test fixture, allowing its customers to program flash architectures including eMMC, PCM and raw NAND, plus MCUs and other device technologies on-board after reflow. In 2012, the company added support for third-party functional testing, such as boundary scan, with the capability to test up to 240 pins in addition to the 960 pins available for programming.

Ideal for medium- to high-volume production, the 2800ISP is configurable and can program up to 16 devices in parallel. Like all 8th Generation programmers, the 2800ISP with BPM's Vector Engine Co-Processor is capable of achieving an amazing peak operating rate of 24 Gbits per second. This solves the test bottleneck while allowing the operator to program the latest data just-in-time, all while attaining a very low programming cost per device.

For more information, meet with company representatives at the show or visit www.bpmmicro.com.
The publisher indicated in each case is solely responsible for the press releases above, the event or job offer displayed, and the image and sound material used (see company info when clicking on image/message title or company info right column). As a rule, the publisher is also the author of the press releases and the attached image, sound and information material.
The use of information published here for personal information and editorial processing is generally free of charge. Please clarify any copyright issues with the stated publisher before further use. In the event of publication, please send a specimen copy to service@pressebox.de.