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Atrenta Opens Research and Development Office in Grenoble, France
R&D center will focus on advanced power reduction and 3D design
The company is now finalizing plans for office space in the Grenoble area that can house up to 20 researchers. Atrenta France SAS is also in the process of joining several industrial research clusters, including CATRENE (Cluster for Application and Technology Research in Europe on NanoElectronics) and Minalogic. The company also disclosed that it has hired Fahim Rahim, Ph.D. as director of engineering for the facility. Dr. Rahim has been a staff research engineer at Lattice Semiconductor, Mentor Graphics and Synopsys before joining Atrenta in August, 2010. He received his degree from the Université Pierre et Marie Curie (Paris VI).
"I believe Atrenta is poised for substantial growth, and I am excited to be leading advanced development in the Grenoble area," said Dr. Fahim Rahim. "The location is rich in engineering talent, and we enjoy strong support from our industrial and economic partners in the area, such as Agence d'Etudes et de Promotion de l'Isére (AEPI ) and Invest in France Agency (IFA)."
Plans for the R&D center include the development of advanced power reduction capabilities and 3D design techniques, which leverage semiconductor process technology advances in stacked die configurations and through silicon via (TSV) structures. The advanced power reduction work will leverage the extensive verification, estimation and reduction capabilities of Atrenta's SpyGlass®-Power product suite. The 3D design work will be focused on early physical prototyping of 3D integrated circuit stacks, and will leverage the company's SpyGlass-Physical and 1Team®-Genesis products.
"Atrenta has a long history of collaborating with customers for advanced product development across Europe," said Bruno Geldreich, president of Atrenta France SAS. "This new research and development facility will allow us to work side by side with our customers on some of the most advanced semiconductor design projects in the world."
"Significant advances in semiconductor process technology are now making 3D stacked die configurations a reality," said Dr. Ajoy Bose, chairman, president and CEO of Atrenta. "The design of these structures poses substantial challenges however. Grenoble is an excellent location where design and process development come together. This, coupled with a significant focus in the area on advanced power reduction makes for an ideal ecosystem to support our new R&D center. Atrenta France SAS is committed to building a world-class team in the Grenoble area."
Atrenta is the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools and methodologies to capture design intent, explore implementation alternatives, validate RTL and optimize designs early, before expensive and time-consuming detailed implementation. With over 150 customers, including the world's top 10 semiconductor companies, Atrenta provides the most comprehensive solution in the industry for Early Design Closure. For more information, visit www.atrenta.com. Atrenta, Right from the Start!
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